The present invention relates to integrated circuit design methods and, in particular, to an interactive method for designing integrated circuit architectures.
The complexity of modern integrated circuits has led to the development of architecture-based designs which use higher level synthesis methods to decrease design cycle time. For example, a typical high level synthesis method uses an algorithmic description of the behavior of the integrated circuit to generate a register transfer level (RTL) hardware implementation of the circuit. The method includes a series of design tasks such as scheduling, resource allocation, binding (mapping a behavioral statement to a specific hardware component), and controller generation. These design tasks are highly interdependent to a level of complexity which is comparable to the complexity of the integrated circuit being designed.
Prior art methods for high level synthesis use an input consisting of a set of behavioral statements and constraints that describe the specified integrated circuit performance. The series of design tasks is automatically executed to provide a hardware implementation at the end. Each design task produces data whose relationship to the behavioral statements is increasingly difficult to perceive, so that a designer has difficulty in associating particular hardware components with specific statements in the behavioral description. If a design error is detected in the hardware implementation, the designer has difficulty in determining which behavioral statement to change. The low level of visibility between hardware components and behavioral statements often makes hardware optimization a trial and error process in which several iterations of the automated design tasks are required. A sizable portion of the design tasks is devoted to redundant calculations of portions of the integrated circuit which do not change from the previous iteration. The expenditure of computing resources is both time consuming and costly.
Hence, there is a need for an architectural design method which allows multiple interactions with data produced by each design task to increase the visibility between hardware and behavior for reducing design time and cost.